Time to look for a kernel update...

classic Classic list List threaded Threaded
98 messages Options
12345
Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

Carlos E. R.-2
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1



On Saturday, 2018-01-06 at 16:08 +1100, Basil Chupin wrote:

> On 06/01/18 00:32, Carlos E. R. wrote:


>>>> Intentionally? They forgot? Ineptitude?
>>>> Did they really think they would not be found out?
>>>> Sigh :-(
>>
>>> But..but...it's taken some 20-odd years to be "found out"! :-)
>>
>> Riiiight.
>>
>> So... Really trust business and market forces to do the right thing?
>
> I was simply responding to what you wrote/asked in your last paragraph.
> But now I realise that I should have been less obtuse in what I wrote
> and should have written, "Yes, they did and they got away with it for
> 20-odd years."

Yes, indeed.

It is just possible that somebody  did find it and used it carefully and
silently to their advantage. And I mean carefully because once found it
can be used in any direction, so better it be a secret.

Besides, I now consider open sourced CPUs a very interesting idea. Not
trusting Intel anymore. Never.

- --
Cheers,
        Carlos E. R.
        (from openSUSE 42.2 x86_64 "Malachite" at Telcontar)

-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2

iEYEARECAAYFAlpQyvIACgkQtTMYHG2NR9WNWACeOgMdjx7mXIKNOgzAYnGLtAYt
5/4Anj6gW/07ipBjIfxgoOdl7YYoiDaS
=Eg1W
-----END PGP SIGNATURE-----

--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

Lew Wolfgang
On 01/06/2018 05:11 AM, Carlos E. R. wrote:
> Besides, I now consider open sourced CPUs a very interesting idea. Not trusting
> Intel anymore. Never.

I haven't trusted them since their FPU bug coverup!

Yes, an open-sourced CPU design would be great.  Perhaps Sun's SPARC
could be used as a starting point?  I believe they open-sourced it before
they were subsumed by Oracle.

Will this dust-up also re-awaken the CISC/RISC debates?  Complexity
and security are inversely proportional, and Intel's complex instruction
set CPU's set the standard for complexity.  They hide whole CPU's inside
the CPU facade they publicly display!   Reduced instruction set CPU's
are consistent with the UNIX Philosophy:  a function should do only a
few basic things, but it should do them very well.

Regards,
Lew


--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

Dave Howorth-3
On Sat, 6 Jan 2018 07:40:23 -0800
Lew Wolfgang <[hidden email]> wrote:

> On 01/06/2018 05:11 AM, Carlos E. R. wrote:
> > Besides, I now consider open sourced CPUs a very interesting idea.
> > Not trusting > Intel anymore. Never.  
>
> I haven't trusted them since their FPU bug coverup!
>
> Yes, an open-sourced CPU design would be great.  Perhaps Sun's SPARC
> could be used as a starting point?  I believe they open-sourced it
> before they were subsumed by Oracle.
>
> Will this dust-up also re-awaken the CISC/RISC debates?  Complexity
> and security are inversely proportional, and Intel's complex
> instruction set CPU's set the standard for complexity.  They hide
> whole CPU's inside the CPU facade they publicly display!   Reduced
> instruction set CPU's are consistent with the UNIX Philosophy:  a
> function should do only a few basic things, but it should do them
> very well.

Perhaps a good starting point may be the RISC-V architecture:

https://riscv.org/

In particular: https://riscv.org/2018/01/more-secure-world-risc-v-isa/

--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

Larry Stotler
In reply to this post by James Knott
On Fri, Jan 5, 2018 at 3:16 PM, James Knott <[hidden email]> wrote:
> There are a lot of people who want deregulation of business, because it
> gets in the way of making more money and they insist business will be
> good and do the "right thing" without regulations.  They ignore the fact
> that it's contrary to what history shows in that very often business
> will do what's right for that business, without regard for harm to
> others.  It's even got to the point where execs are doing what's good
> for them, regardless of damage they cause to the company they work for.
> It all boils down to blatant greed at the top.  Trump, with his recent
> changes, will only make a very bad situation worse.

So all businesses should be punished for the greed of a few?   People
have a choice(generally) as to doing business with a company of not.
I don't do business with Facebook because I don't trust them or see
any use in their "product"(basically selling my info to advertisers).

I don't trust politicians to take tax money and do the right thing.
If it's a choice between trusting a business or the government, I will
take a business any day.

Just my 2 cents.

--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

Wol's lists
In reply to this post by Lew Wolfgang
On 06/01/18 15:40, Lew Wolfgang wrote:
> On 01/06/2018 05:11 AM, Carlos E. R. wrote:
>> Besides, I now consider open sourced CPUs a very interesting idea. Not
>> trusting Intel anymore. Never.
>
> I haven't trusted them since their FPU bug coverup!

Companies aren't good - or bad. It's the people in them (usually set by
direction from the top).

That's why I trust Google, but not Facebook. Not that I trust them
implicitly, but if Google messes me up I expect it to be a genuine
accident. Facebook is far more likely to be "accidentally on purpose".
>
> Yes, an open-sourced CPU design would be great.  Perhaps Sun's SPARC
> could be used as a starting point?  I believe they open-sourced it before
> they were subsumed by Oracle.

Surely it's not beyond the wit of the Open Source crowd to define a
basic VLW RISC instruction set, and then put a CISC interpreter layer on
top ...
>
> Will this dust-up also re-awaken the CISC/RISC debates?  Complexity
> and security are inversely proportional, and Intel's complex instruction
> set CPU's set the standard for complexity.  They hide whole CPU's inside
> the CPU facade they publicly display!  

For very good reason, unfortunately :-( Modern CPUs can be clocked to
what - 5GHz? That means that - per instruction cycle - a signal can move
approximately two inches. Meanwhile, a motherboard is about a foot
square ... Today's fast chips *need* to have pretty much an entire
computer inside the die simply to be able to work at speed.

> Reduced instruction set CPU's
> are consistent with the UNIX Philosophy:  a function should do only a
> few basic things, but it should do them very well.
>
That's great, but don't forget the SECOND half of Einstein's great
dictum - make things as simple as possible BUT NO SIMPLER. (Don't get me
started - relational theory is great but as the basis of a database
engine IT'S TOO SIMPLE.)

The following makes interesting reading ...

https://science.ksc.nasa.gov/shuttle/missions/51-l/docs/rogers-commission/Appendix-F.txt

One of Feynmann's key points is that management has a habit of fooling
itself, and I have no doubt that Intel are sincere. Whether they are,
like the best conmen, fooling themselves is open to debate.

And actually, why should I assume other companies are any different? Who
remembers the Lenovo root certificate scandal? There are too many people
in positions of influence who, in all sincerity, push for decisions
whose consequences they have no clue about. And unfortunately usually
the people who DO have a clue are in no position to influence the decision.

What's that saying? "Trust but verify". What's that alleged saying by
Churchill? "The Americans can always be trusted to do the right thing.
After they've tried all the alternatives, of course". Companies are no
different. Which is why the loss of so many engineers in senior
management is a technological tragedy :-(

Cheers,
Wol


--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

Anton Aylward-2
In reply to this post by Lew Wolfgang
On 06/01/18 10:40 AM, Lew Wolfgang wrote:
> Reduced instruction set CPU's
> are consistent with the UNIX Philosophy:  a function should do only a
> few basic things, but it should do them very well.

Well RISC is at risk.
The origins of the ARM lie in RISC but we've come a long way since then.
<quote
src="https://www.extremetech.com/computing/187513-why-apple-wont-dump-intel-x86-for-its-own-arm-chips-in-macbooks-and-the-mac-pro">

... also reprints some laughably untrue assertions about the ARM-x86 comparison,
writing “The aging x86 architecture is beset by layers of architectural silt
accreted from a succession of additions to the instruction set. Emerging media
formats demand new extensions, while obsolete constructs must be maintained for
the sake of Microsoft’s backward compatibility religion.”

</quote>

Also
https://www.androidauthority.com/arm-vs-x86-key-differences-explained-568718/

Many years ago I worked with an English Electric 800 Series computer.  It was
all transistors, an asynchronous CPU, and was FAST!
It did only have 16 opcodes They were hard-wired, not microcoded.  I never
peered at the logic and it must have been frightening.  But it really really was
just 16 instructions.  I  think it was a 803 with 39 bt words that contained 2
16-bit instructions (or one plus an address parameter).  IO was TTY and paper-tape.

Later models upped the instruction repertoire to 64 to do more things with
arithmetic like 'negate and add', but model I had worked n 16 instructions.  OK,
one was "DO IO" which was ... complex ... but hard-wired.

If you've read Knuth you'll be aware that you don't need more than those 16
opcodes.  See the MIX assembly language, which, sadly, multiplies them out when
it comes to writing, because of the way modifier works, so there are a half
dozen ways the LOAD command can work.

Again, in "Algorithms and Data structures = programs" there is a true RISK VM
model in the PASCAL interpreter.  The main difference between Knuth and Wirth is
that the latter works with a single register machine, Europeans being more
parsimonious in their architecture than Americans, who preferred multi-register
machines, and as a side effect, the compiler parse tree is easily translated
into reverse polish which is suitable for a single register machine.

If you are going to throw compiler optimization at things, the RP/single
register machine is very, very easy to optimise code pathways for, no need to
worry about register allocation & dumping strategies (and less context to save
on interrupts!).  You can make the compiler small and fast; or you can make it
capable of doing more global optimization and probabilistic execution
tree-branch analysis.

Some of there attempts at RISK were based on the idea that now there was so much
silicon on the chip freed up -- oh, wait, we've moved on from transistors and
are playing in a new field -- that the machine can now have lots of registers.
One model was actually a zero-register concept with everything being indirect
and the working memory being on chip.  Dealing with interrupts means simply
switching the register bank pointer.  Silicon real estate was cheap; heck today
its even cheaper and that kind of RISK makes more sense now.
A variant of this is
https://en.wikipedia.org/wiki/Register_window

The SPARC architecture also makes use of a lot of registers and modern silicon
fabrication can work on the initial spec to offer even more.
<quote src="https://en.wikipedia.org/wiki/SPARC">
The SPARC processor usually contains as many as 160 general purpose registers.
According to the "Oracle SPARC Architecture 2015" specification an
"implementation may contain from 72 to 640 general-purpose 64-bit" registers.[3]
At any point, only 32 of them are immediately visible to software — 8 are a set
of global registers (one of which, g0, is hard-wired to zero, so only seven of
them are usable as registers) and the other 24 are from the stack of registers.
These 24 registers form what is called a register window, and at function
call/return, this window is moved up and down the register stack. Each window
has 8 local registers and shares 8 registers with each of the adjacent windows.

</quote>

There is also mention in the above  that "Several fully open source
implementations of the SPARC architecture exist".
https://en.wikipedia.org/wiki/SPARC#Open_source_implementations
Those seem to be 'designs' rather than 'in production'.

I suspect, however, that if we were to drive for an implementation of the SPARC
we might as well go the whole hog and  go for the
<quote src="https://en.wikipedia.org/wiki/UltraSPARC_T2">

Sun Microsystems' UltraSPARC T2 microprocessor is a multithreading, multi-core
CPU. It is a member of the SPARC family, and the successor to the UltraSPARC T1.
The chip is sometimes referred to by its codename, Niagara 2.

</quote>

And at https://en.wikipedia.org/wiki/UltraSPARC_T2#Open_design
<quote>
On December 11, 2007, Sun made the UltraSPARC T2 processor design publicly
available under the GNU General Public License via the OpenSPARC project. The
release includes:

    Verilog RTL source code of the design
    Verification environment
    Diagnostics tests
    Open source tools, scripts and Sun internal tools needed to simulate the design
    ISA specification (UltraSPARC Architecture 2007)
    Solaris 10 OS simulation images

</quote>
I'm not aware of any FOSS implementation.




</quote>






We had the Elliott Algol compiler was co-written by C.A.R. (Tony) Hoare.



--
         A: Yes.
     >   Q: Are you sure?
     >>  A: Because it reverses the logical flow of conversation.
     >>> Q: Why is top posting frowned upon?


--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

Wol's lists
On 06/01/18 16:48, Anton Aylward wrote:
> The SPARC processor usually contains as many as 160 general purpose registers.
> According to the "Oracle SPARC Architecture 2015" specification an
> "implementation may contain from 72 to 640 general-purpose 64-bit" registers.[3]
> At any point, only 32 of them are immediately visible to software — 8 are a set
> of global registers (one of which, g0, is hard-wired to zero, so only seven of
> them are usable as registers) and the other 24 are from the stack of registers.
> These 24 registers form what is called a register window, and at function
> call/return, this window is moved up and down the register stack. Each window
> has 8 local registers and shares 8 registers with each of the adjacent windows.

This sounds to me a bit like the NatSemi 32000 line - it used main
memory iirc as its registers, and to save the current settings, you just
pushed the base address onto the stack and then moved said base address.

But as I said in my other post, the increasing clock speed of cpu's
means that more and more stuff has had to move into the cpu chip itself.
That said, the ability to do a complete context shift just by changing
the value of one offset sounds a very nice thing to have...

Cheers,
Wol

--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

James Knott
In reply to this post by Larry Stotler
On 01/06/2018 11:33 AM, Larry Stotler wrote:

> On Fri, Jan 5, 2018 at 3:16 PM, James Knott <[hidden email]> wrote:
>> There are a lot of people who want deregulation of business, because it
>> gets in the way of making more money and they insist business will be
>> good and do the "right thing" without regulations.  They ignore the fact
>> that it's contrary to what history shows in that very often business
>> will do what's right for that business, without regard for harm to
>> others.  It's even got to the point where execs are doing what's good
>> for them, regardless of damage they cause to the company they work for.
>> It all boils down to blatant greed at the top.  Trump, with his recent
>> changes, will only make a very bad situation worse.
> So all businesses should be punished for the greed of a few?   People
> have a choice(generally) as to doing business with a company of not.
> I don't do business with Facebook because I don't trust them or see
> any use in their "product"(basically selling my info to advertisers).
>
> I don't trust politicians to take tax money and do the right thing.
> If it's a choice between trusting a business or the government, I will
> take a business any day.
>
> Just my 2 cents.
>

No, I don't think all businesses should be punished for the few.
However, I expect all businesses to held accountable for their actions,
including personal penalties for the execs & board when appropriate.  At
one time the board was always legally responsible.  As for examples of
why this is needed, look at how the guy that owned most of Sears Canada
stole the pension funds and wages from employees.  Or how Nortel was
trashed by execs cooking the books.  There are a lot more examples of
where greed at the top has caused a lot of harm for others.


--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

Wol's lists
On 06/01/18 18:50, James Knott wrote:
> As for examples of
> why this is needed, look at how the guy that owned most of Sears Canada
> stole the pension funds and wages from employees.  Or how Nortel was
> trashed by execs cooking the books.  There are a lot more examples of
> where greed at the top has caused a lot of harm for others.

Kenneth Lay? Rupert Murdoch. As you say, plenty more.

The problem is how do you hold executives accountable for the actions of
the company? How do you prove they knew what was going on, and weren't
hoodwinked by the people below them? (Or were deluding themselves that
things weren't as bad as they looked.)

I think the real problem lies in the legislative assumption that
companies are supposed to act in the interests of SHAREholders.

The *reality* is that companies should act in the interests of their
stakeholders because quite often you can't tell the difference between
shareholders, employees and customers. But because of the way things are
now set up, people don't have a clue ...

The majority of people work for small companies. The system is rigged in
favour of big companies. What more needs to be said?

Cheers,
Wol

--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

Larry Stotler
In reply to this post by James Knott
On Sat, Jan 6, 2018 at 1:50 PM, James Knott <[hidden email]> wrote:
> No, I don't think all businesses should be punished for the few.
> However, I expect all businesses to held accountable for their actions,
> including personal penalties for the execs & board when appropriate.  At
> one time the board was always legally responsible.  As for examples of
> why this is needed, look at how the guy that owned most of Sears Canada
> stole the pension funds and wages from employees.  Or how Nortel was
> trashed by execs cooking the books.  There are a lot more examples of
> where greed at the top has caused a lot of harm for others.

I do agree with that.  However, the problem is that corruption is
everywhere.  In business, government, etc, etc.  Some people seem to
think that you can legislate morality and you can't.  People are going
to do what they decide to do no matter what the law or the
consequences may be.  Lawyers get elected to office, and they write
the laws.  Other lawyers become judges and they decide/interpret the
law.  The rest of them argue the law and promise the world to their
clients and charge outrageous fees to do so.

The difference between business and government is that with business
you have a choice to do business or not.  With government, you have
little choice other than trying to vote in someone else.  But there
are so many more "public servants" that are elected that are almost
accountable to no one. Of course with Obamacare here in the US, the
Government tried to force you to do business whether you wanted to or
not.

Money and wealth are what run the world.  Those who have it make the
rules to benefit them.  Those who don't complain about the rules.

--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

James Knott
On 01/06/2018 03:44 PM, Larry Stotler wrote:
> Of course with Obamacare here in the US, the
> Government tried to force you to do business whether you wanted to or
> not.
>
> Money and wealth are what run the world.  Those who have it make the
> rules to benefit them.  Those who don't complain about the rules.

One thing to bear in mind is that health care in the U.S. has been a
disaster, for many years before Obama.  It's is the most expensive in
the world, yet leaves many without any health care.  At least Omamacare
tried to make health care universal.  In Canada, our health care is paid
through our taxes.  As a result, I can go to a doctor or hospital and
not worry about having to pay a bill.  It falls short in that it does
not cover dental or most prescriptions, both of which are essential to a
proper health care system.

The big problem in the U.S. are those who are absolutely against
anything that helps those who need help.


--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

Wol's lists
On 06/01/18 21:33, James Knott wrote:
> The big problem in the U.S. are those who are absolutely against
> anything that helps those who need help.

The other big problem, from what I understand, is that as in so many
other things, the number of healthcare providers has dropped massively.
As a result, new startups rapidly get bought out ...

The insurance companies can negotiate big discounts, but for those
people who can't afford insurance they have to pay list price, which can
easily be several times what the insurance companies charge. As always,
those who can least afford it, have to pay most ...

(I can't defend a lot about the NHS, I think we've gone the other way
where we won't let people pay who can, but at least care is available to
everyone, and it's reasonably decent care.)

Cheers,
Wol

--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

Dave Howorth-3
On Sat, 6 Jan 2018 22:34:36 +0000
Wol's lists <[hidden email]> wrote:
> (I can't defend a lot about the NHS, I think we've gone the other way
> where we won't let people pay who can, but at least care is available
> to everyone, and it's reasonably decent care.)

Your choice of the word 'care' was perhaps unfortunate, since that's
exactly where the NHS isn't available to everyone. Local authorities
pay discount rates to care homes for those un/lucky enough to qualify,
whilst others have to pay themselves at inflated rates that subsidise
the public purse.

And of course, anybody can pay for pretty much anything if they want,
the only thing that is not allowed is private care in some parts of
some NHS hospitals, AIUI.

--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

Carlos E. R.-2
In reply to this post by Lew Wolfgang
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1



On Saturday, 2018-01-06 at 07:40 -0800, Lew Wolfgang wrote:

> On 01/06/2018 05:11 AM, Carlos E. R. wrote:
>>  Besides, I now consider open sourced CPUs a very interesting idea. Not
>>  trusting Intel anymore. Never.
>
> I haven't trusted them since their FPU bug coverup!
>
> Yes, an open-sourced CPU design would be great.  Perhaps Sun's SPARC
> could be used as a starting point?  I believe they open-sourced it before
> they were subsumed by Oracle.

But this is a company that is very happy to litigate, so nobody wanted to
risk it. At least, this is what one of the recent articles I read said.

- --
Cheers,
        Carlos E. R.
        (from openSUSE 42.2 x86_64 "Malachite" at Telcontar)

-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2

iEYEARECAAYFAlpSZyAACgkQtTMYHG2NR9WqmACfdILltZlrnPnnF4Me/wKWph2q
hGsAn2asp3FV0syD1bWC5tbhaVkyUVNW
=4CV0
-----END PGP SIGNATURE-----
Reply | Threaded
Open this post in threaded view
|

Re: chip sniffing - are single core cpus affected?

Carlos E. R.-2
In reply to this post by David T-G-2
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1



On Wednesday, 2018-01-03 at 14:05 -0500, David T-G wrote:

> Carlos, et al --
>
> ...and then Carlos E. R. said...
> %
> ...
> % Any method to know if /my/ processor is affected? It was bought several
> % years ago. A list of exact processor models for looking in
> % /proc/cpuinfo, perhaps.
> [snip]
>
> That certainly would be a nice twist.  Suddenly all of those old chips
> out there run faster than the fancy new whiz-bangs just because they
> don't need the super-secure kernel shuffling :-)


Now I wonder if single core CPUs are affected.

This issue is related to paralelization optimizations. Thus I wonder
whether a machine that doesn't paralelize is affected.

I also wonder if a virtual machine that is given a single core of a
multi-core CPU is affected.

- --
Cheers,
        Carlos E. R.
        (from openSUSE 42.2 x86_64 "Malachite" at Telcontar)

-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2

iEYEARECAAYFAlpSaNAACgkQtTMYHG2NR9XzYACeKG2vkz7B+TLLRJZ7LDrkimCX
B8QAn3yE7SrSsLtdauspPL7lQOouBqoA
=ehPS
-----END PGP SIGNATURE-----

--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: time to pressure Intel for a chip replacement (was Re: Time to look for a kernel update...)

Markus Koßmann-3
In reply to this post by Carlos E. R.-2
Am Sonntag, 7. Januar 2018, 19:29:52 schrieb Carlos E. R.:

> On Saturday, 2018-01-06 at 07:40 -0800, Lew Wolfgang wrote:
> > On 01/06/2018 05:11 AM, Carlos E. R. wrote:
> >>  Besides, I now consider open sourced CPUs a very interesting idea. Not
> >>  trusting Intel anymore. Never.
> >
> > I haven't trusted them since their FPU bug coverup!
> >
> > Yes, an open-sourced CPU design would be great.  Perhaps Sun's SPARC
> > could be used as a starting point?  I believe they open-sourced it before
> > they were subsumed by Oracle.
>
> But this is a company that is very happy to litigate, so nobody wanted to
> risk it. At least, this is what one of the recent articles I read said.
There is the OpenRisc Project ( https://openrisc.io/) .

--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: chip sniffing - are single core cpus affected?

Wol's lists
In reply to this post by Carlos E. R.-2
On 07/01/18 18:37, Carlos E. R. wrote:

> -----BEGIN PGP SIGNED MESSAGE-----
> Hash: SHA1
>
>
>
> On Wednesday, 2018-01-03 at 14:05 -0500, David T-G wrote:
>
>> Carlos, et al --
>>
>> ...and then Carlos E. R. said...
>> %
>> ...
>> % Any method to know if /my/ processor is affected? It was bought several
>> % years ago. A list of exact processor models for looking in
>> % /proc/cpuinfo, perhaps.
>> [snip]
>>
>> That certainly would be a nice twist.  Suddenly all of those old chips
>> out there run faster than the fancy new whiz-bangs just because they
>> don't need the super-secure kernel shuffling :-)
>
>
> Now I wonder if single core CPUs are affected.
>
> This issue is related to paralelization optimizations. Thus I wonder
> whether a machine that doesn't paralelize is affected.

It's the pipeline that's affected. That's part of a single-core cpu, so
yes it probably is affected.
>
> I also wonder if a virtual machine that is given a single core of a
> multi-core CPU is affected.
>
I wonder what virtualisation does full stop. Obviously, if there are
multiple virtual systems it can't control what other systems are running
when, but if it gives away things like passwords etc then there's a problem.

Cheers,
Wol

--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: chip sniffing - are single core cpus affected?

Per Jessen
In reply to this post by Carlos E. R.-2
Carlos E. R. wrote:

> On Wednesday, 2018-01-03 at 14:05 -0500, David T-G wrote:
>
>> Carlos, et al --
>>
>> ...and then Carlos E. R. said...
>> %
>> ...
>> % Any method to know if /my/ processor is affected? It was bought
>> several % years ago. A list of exact processor models for looking in
>> % /proc/cpuinfo, perhaps.
>> [snip]
>>
>> That certainly would be a nice twist.  Suddenly all of those old
>> chips out there run faster than the fancy new whiz-bangs just because
>> they don't need the super-secure kernel shuffling :-)
>
>
> Now I wonder if single core CPUs are affected.
>
> This issue is related to paralelization optimizations. Thus I wonder
> whether a machine that doesn't paralelize is affected.

Jump prediction in the pipeline is not related to the number of cores.

> I also wonder if a virtual machine that is given a single core of a
> multi-core CPU is affected.

Yes it is.



--
Per Jessen, Zürich (3.9°C)
http://www.dns24.ch/ - your free DNS host, made in Switzerland.


--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

Reply | Threaded
Open this post in threaded view
|

Re: chip sniffing - are single core cpus affected?

Carlos E. R.-2
On 2018-01-07 20:22, Per Jessen wrote:
> Carlos E. R. wrote:

>> Now I wonder if single core CPUs are affected.
>>
>> This issue is related to paralelization optimizations. Thus I wonder
>> whether a machine that doesn't paralelize is affected.
>
> Jump prediction in the pipeline is not related to the number of cores.

Well, it can preload in advance the pipeline. But it can not compute the
alternatives; it has to wait till it evaluates the condition, then
compute a single one, the correct one, that is hopefully already loaded
in the pipeline.

With a cpu that can do parallelization in hardware, both tracks can
start to compute before reaching the branch; then one is discarded.

That's from reading
<https://www.raspberrypi.org/blog/why-raspberry-pi-isnt-vulnerable-to-spectre-or-meltdown/>


>> I also wonder if a virtual machine that is given a single core of a
>> multi-core CPU is affected.
>
> Yes it is.

:-(

--
Cheers / Saludos,

                Carlos E. R.
                (from 42.2 x86_64 "Malachite" at Telcontar)


signature.asc (188 bytes) Download Attachment
Reply | Threaded
Open this post in threaded view
|

Re: chip sniffing - are single core cpus affected?

gregfreemyer
On Sun, Jan 7, 2018 at 2:40 PM, Carlos E. R.
<[hidden email]> wrote:

> On 2018-01-07 20:22, Per Jessen wrote:
>> Carlos E. R. wrote:
>
>>> Now I wonder if single core CPUs are affected.
>>>
>>> This issue is related to paralelization optimizations. Thus I wonder
>>> whether a machine that doesn't paralelize is affected.
>>
>> Jump prediction in the pipeline is not related to the number of cores.
>
> Well, it can preload in advance the pipeline. But it can not compute the
> alternatives; it has to wait till it evaluates the condition, then
> compute a single one, the correct one, that is hopefully already loaded
> in the pipeline.
>
> With a cpu that can do parallelization in hardware, both tracks can
> start to compute before reaching the branch; then one is discarded.
>
> That's from reading
> <https://www.raspberrypi.org/blog/why-raspberry-pi-isnt-vulnerable-to-spectre-or-meltdown/>

Carlos,

You fundamentally misunderstand the raspberrypi article.

The parallelism it describes is within a single superscalar core.
Thus, a modern Intel "core" has internal parallelism as described in
the article.

Multiple cores are used to run multiple totally unrelated instruction
streams (ie. 2 different programs), and each core has parallelism as
described n the article.

In fact a modern Intel core has so much internal parallelism, much of
the parallelism is wasted.  That's where hyperthreading comes in.
With hyperthreading two instruction streams are executed
simultaneously, but there are parts of the parallelism that are shared
between the 2 instruction streams.

Greg

--
To unsubscribe, e-mail: [hidden email]
To contact the owner, e-mail: [hidden email]

12345